Codasip joins the Intel Pathfinder for RISC-V program

Munich, Germany, August 31, 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today announced that it will make its 32-bit L31 core available through the Professional Edition of the Intel® Pathfinder program for RISC-V*. By joining the program, Codasip makes its award-winning embedded RISC-V technology more accessible for prototyping, production design, or research purposes using Intel FPGAs.

Particularly in the early stages of the SoC development cycle, it is beneficial to undertake architectural exploration and explore different configurations and combinations of IP. The Intel Pathfinder announced yesterday provides a common environment for accessing RISC-V and peripheral IP for its FPGA boards.

“FPGAs are an essential part of the electronics industry in both prototyping and production,” said Rupert Baines, CDA of Codasip, “We welcome Intel’s investment in this program. Its demonstrable commitment to RISC-V will benefit the entire RISC-V ecosystem. We are honored to be part of this initiative enabling our customers to take advantage of Intel® FPGAs when developing their RISC-V SoCs.”

“The rapid emergence of RISC-V is opening up new avenues for building products and solutions. We strive to galvanize the RISC-V ecosystem around a shared vision to accelerate adoption. To that end, we are excited to see Codasip enable its Intel Pathfinder Processor IP for RISC-V,” said Vijay Krishnan, General Manager, RISC-V Ventures at Intel.

Similarly, it is good to start software development early in the design cycle. This program includes a unified IDE and software stack comprising commonly used software toolchains and operating systems providing the essentials for embedded software developers.

More information about Intel Pathfinder for RISC-V is available at

As part of the cooperation, Intel FPGA boards and the Intel software stack can be combined with the Codasip bitmap file for the L31 RISC-V core. This benefits developers of applications such as the Internet of Things (IoT) and advanced artificial intelligence.

The L31 bitmap file for Intel FPGAs can be downloaded from the Codasip site

The Codasip L31 is a 32-bit embedded RISC-V core supporting the RV32IMCB instruction set. It has a 3-stage pipeline and a range of configuration options including tightly coupled caches and memories.

About Codasip

Codasip provides state-of-the-art RISC-V processor IP and high-level processor design tools, giving IC designers all the benefits of the RISC-V open ISA, plus the unique ability to customize the IP of the processor. As a founding member of RISC-V International and a long-time provider of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded and application processors. Founded in 2014 and based in Munich, Germany, Codasip currently has R&D centers in Europe and sales representatives around the world. For more information on our products and services, visit For more information about RISC-V, visit

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